Modiwl IES-2006:
VLSI Design Principles

Ffeithiau’r Modiwl

Rhedir gan School of Computer Science and Electronic Engineering

10 Credyd neu 5 Credyd ECTS

Semester 1

Trefnydd: Dr Iestyn Pierce

Amcanion cyffredinol

This module aims to introduce the concepts and design techniques of Very Large Scale Integration systems through a study of Application Specific Integrated Circuits (ASICs), with particular emphasis on Field Programmable Gate Arrays (FPGAs).

Cynnwys cwrs

• ASIC technologies: fully custom, standard cell, gate array and programmable ASICs. Influence of total cost on choice of ASIC type.

• Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs). Programming technology. CMOS logic cells. Coarse-grained vs fine-grained architectures. Routing and Timing. I/O cells. Embedded microprocessors.

• ASIC Design Software, design flows and design entry methods: Schematic Entry, Hardware Description Languages (HDLs): VHDL.

• Behavioural and structural models. Event-driven simulation. Logic Synthesis: limitations of HDL based logic synthesis.

• Register Transfer Level (RTL) design: datapath, High Level State Machines (HSM), operator binding, operator scheduling, area-time trade-offs.

Cyswllt Canlyniad dysgu i Meini Prawf

  threshold

40%

good

60%

excellent

70%

Know about the different types of ASIC available and their suitability for different applications.

Can state the different types of ASIC available. Shows basic knowledge of relative production cost per unit and cost to design of different types of ASIC. Can describe the construction and architecture of different ASIC types. Can choose most suitable type based on cost when choice is clear. Can give a reasoned argument for a particular choice of technology.

Understand the principles of Programmable ASIC technology.

Can describe architecture of FPGAs and their logic and I/O cells. Shows knowledge of timing limitations. Demonstrates understanding of the basic physics of CMOS logic cells. Can build simple logic functions from standard cells. Can perform timing analysis of simple circuits, using reasonable approximations based on underlying physics.

Understand the principles of ASIC design.

Can describe the ASIC design process. Can specify simple logic circuits using VHDL. Can describe the simulation process. Knows the differences between behavioural and structural models. Can explain the need for behavioural and structural models for the same circuit. Can perform “dry runs” of VHDL simulations. Can devise simple RTL designs. Can describe the limitations and pitfalls of HDL-based logic synthesis and design. Can perform “dry runs” of VHDL simulations showing correct use of Delta Time. Can evaluate alternative RTL designs.

Dulliau asesu

Math Enw Disgrifiad Pwysau
Assignment (Optional) 20
Examination 80

Strategaeth addysgu a dysgu

Oriau
Private study

Worked examples, design problems, attempting tutorial questions, completing past exam papers, revision.

76
Lecture

2 x 1 hour lectures per week for 12 weeks includes 4 x 1 hour tutorial sessions in lecture slots

24

Sgiliau Trosglwyddadwy

  • Llythrennedd - Medrusrwydd mewn darllen ac ysgrifennu drwy amrywiaeth o gyfryngau
  • Rhifedd - Medrusrwydd wrth ddefnyddio rhifau ar lefelau priodol o gywirdeb
  • Defnyddio cyfrifiaduron - Medrusrwydd wrth ddefnyddio ystod o feddalwedd cyfrifiadurol
  • Hunanreolaeth - Gallu gweithio mewn ffordd effeithlon, prydlon a threfnus. Gallu edrych ar ganlyniadau tasgau a digwyddiadau, a barnu lefelau o ansawdd a phwysigrwydd
  • Dadansoddi Beirniadol & Datrys Problem - Gallu dadelfennu a dadansoddi problemau neu sefyllfaoedd cymhleth. Gallu canfod atebion i broblemau drwy ddadansoddiadau ac archwilio posibiliadau
  • Cyflwyniad - Gallu cyflwyno gwybodaeth ac esboniadau yn glir i gynulleidfa. Trwy gyfryngau ysgrifenedig neu ar lafar yn glir a hyderus.
  • Hunanymwybyddiaeth & Ystyried - Bod yn ymwybodol o'ch cryfderau, gwendidau, nodau ac amcanion eich hun. Gallu adolygu ,cloriannu a myfyrio'n rheolaidd ar eich perfformiad eich hun ac eraill.

Sgiliau pwnc penodol

  • Apply underpinning concepts and ideas of engineering;
  • Apply knowledge and understanding of the specialist cognate area of electronic engineering in an international context;
  • Apply knowledge and understanding of the specialist cognate area of computer systems engineering in an international context;
  • Apply knowledge and understanding of the specialist cognate area of computer systems for controlling complex systems;
  • Apply knowledge and understanding of the specialist cognate area of computer systems engineering in safety-critical areas;
  • Solve problems logically and systematically;
  • Demonstrate familiarity with relevant subject specific and general computer software packages.

Rhagofynion a Chydofynion

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